Microchip Technology /ATSAME54P19A /QSPI /INSTRFRAME

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Interpret as INSTRFRAME

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SINGLE_BIT_SPI)WIDTH0 (INSTREN)INSTREN 0 (ADDREN)ADDREN 0 (OPTCODEEN)OPTCODEEN 0 (DATAEN)DATAEN 0 (1BIT)OPTCODELEN 0 (24BITS)ADDRLEN 0 (READ)TFRTYPE 0 (CRMODE)CRMODE 0 (DDREN)DDREN 0DUMMYLEN

WIDTH=SINGLE_BIT_SPI, ADDRLEN=24BITS, TFRTYPE=READ, OPTCODELEN=1BIT

Description

Instruction Frame

Fields

WIDTH

Instruction Code, Address, Option Code and Data Width

0 (SINGLE_BIT_SPI): Instruction: Single-bit SPI / Address-Option: Single-bit SPI / Data: Single-bit SPI

1 (DUAL_OUTPUT): Instruction: Single-bit SPI / Address-Option: Single-bit SPI / Data: Dual SPI

2 (QUAD_OUTPUT): Instruction: Single-bit SPI / Address-Option: Single-bit SPI / Data: Quad SPI

3 (DUAL_IO): Instruction: Single-bit SPI / Address-Option: Dual SPI / Data: Dual SPI

4 (QUAD_IO): Instruction: Single-bit SPI / Address-Option: Quad SPI / Data: Quad SPI

5 (DUAL_CMD): Instruction: Dual SPI / Address-Option: Dual SPI / Data: Dual SPI

6 (QUAD_CMD): Instruction: Quad SPI / Address-Option: Quad SPI / Data: Quad SPI

INSTREN

Instruction Enable

ADDREN

Address Enable

OPTCODEEN

Option Enable

DATAEN

Data Enable

OPTCODELEN

Option Code Length

0 (1BIT): 1-bit length option code

1 (2BITS): 2-bits length option code

2 (4BITS): 4-bits length option code

3 (8BITS): 8-bits length option code

ADDRLEN

Address Length

0 (24BITS): 24-bits address length

1 (32BITS): 32-bits address length

TFRTYPE

Data Transfer Type

0 (READ): Read transfer from the serial memory.Scrambling is not performed.Read at random location (fetch) in the serial flash memory is not possible.

1 (READMEMORY): Read data transfer from the serial memory.If enabled, scrambling is performed.Read at random location (fetch) in the serial flash memory is possible.

2 (WRITE): Write transfer into the serial memory.Scrambling is not performed.

3 (WRITEMEMORY): Write data transfer into the serial memory.If enabled, scrambling is performed.

CRMODE

Continuous Read Mode

DDREN

Double Data Rate Enable

DUMMYLEN

Dummy Cycles Length

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